1. Field of the Disclosure
The present disclosure relates to wafer alignment marks, methods of measuring wafer alignment using the alignment marks, and methods of manufacturing semiconductor devices using the methods of measuring wafer alignment.
2. Description of the Related Art
Typically, a circuit pattern is formed on a wafer by performing a photolithography process. When a photolithography process is performed, a wafer is exposed to light by using a mask having a patterned surface.
Such an exposure process may be performed on a plurality of layers. As processes becomes finer and more complicated, the plurality of layers may be aligned with a wafer and/or with a pattern/mark on the wafer before performing an exposure process.